To help explore infinite design possibilities with TI Sitara™ ARM® Processors, Texas Instruments has created the Sitara ARM Processors Boot Camp. This modular training series for TI’s Sitara ARM Processors is based on the latest development kits from TI and provides in-depth technical discussion and hands-on exercises for all aspects of the solution; from architecture to peripherals to software and development environments.
This training series provides an in-depth look at KeyStone multicore SoC devices.
The "Linux Board Porting" online series is comprised of nine, 10-minute modules (3 Lecture and 6 Lab) that provide an introduction to porting U-boot and the Linux Kernel to custom hardware platforms.
TI’s AM57x family, along with the Processor SDK, brings unrivaled integration, scalability, peripherals and ease of use associated with the powerful Sitara processor platform. Sitara AM57x processors' unique heterogeneous architecture including ARM® Cortex®-A15 cores, C66x DSPs, programmable real-time units (PRU), ARM Cortex-M4 cores, and video and graphic accelerators make the AM57x processors unmatched in their class.
TI provides key runtime software components and documentation to further ease development. TI’s online training provides an introduction to the Processor SDK and how to use this software to start building applications on TI embedded processors.
TI’s TMS320C55x Fixed-Point Digital Signal Processors (DSP) enable high performance and low power through increased parallelism and total focus on power savings. Industry-leading active power enables computationally-intensive applications, such as voice triggering and encoding, to run on battery for extended period of time. Development tools include the award-winning eXpressDSP, Code Composer Studio (CCS), Integrated Development Environment (IDE), DSP/BIOS, optimized DSP and math libraries, and the industry’s largest third-party network.
Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS / PRU-ICSSG) Training Series
The Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS / PRU-ICSSG) is a small processor that is tightly integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices including the AM335x, AM437x, AM57x, and AM65x Sitara Processors. The PRU-ICSS / PRU-ICSSG is customer-programmable and can be used to implement simple and flexible control functions, peripherals, and state machines that directly access IO pins of the device, as well as can communicate with the application cores.
Similar to existing KeyStone-based SoC devices, the 66AK2Gx enables both the DSP and ARM cores to master all memory and peripherals in the system. This architecture facilitates maximum software flexibility where either DSP- or ARM-centric system designs can be achieved.
This curriculum provides an in-depth look at the K2G Processors, Processor SDK-Linux and TI-RTOS, and the Programmable Realtime Unit (PRU).
TI’s AM437x family, along with the Processor SDK, delivers unrivaled integration, scalability, peripherals and ease of use associated with the powerful Sitara processor platform. The Sitara AM437x processor architecture includes ARM® Cortex®-A9 cores, programmable real-time units (PRU), video and graphic accelerators, and customer-programmable secure boot make the AM437x processors unmatched in their class.
In this series, you will gain an understanding of the TI security framework and the various industry-recognized security enablers that TI supports.
The Internet of Things (IoT) is now part of the smarter grid through the adoption of IPv6 communications networks. These 6LoWPAN-based networks address key concerns such as standards-based interoperability, reliability, low power, and long-distance connectivity.
Linux is well-adopted within embedded systems. But debugging Linux system issues can be overwhelming. This training series teaches the techniques of debugging kernel issues that may be encountered in embedded Linux systems. This training series explains the Linux kernel logging system and logging API, illustrates how to locate a particular device driver, and demonstrates how to read kernel oops logs.
This training series looks at High Availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP), which are fundamental to many of the tightly-synchronized, high-reliability systems being built today. HSR and PRP work together or separate to keep systems working even when things break so that power stays on and things keep getting built. Both of them work in the low levels of the Ethernet stack to provide the applications that they serve these fundamental capabilities.
This training series provides an introduction to voice recognition and some of the basic concepts of audio systems that use voice as a user interface. It provides a guide to required components and how they match to embedded processors and other devices available from Texas Instruments. And it takes a look at the software, tools, designs, and demonstrations available from TI for building your own voice recognition and processing application.
Advanced closed-loop control systems for factory, process, and power automation markets require powerful MCU solutions that can interface to variety of industrial communications protocols. As new features and capabilities are added, these protocols may evolve several times during the lifetime of an industrial product. As a result, system providers can benefit from solutions that flexibly support multiple communications protocols and in-service updates without updating hardware.
This training presents TI’s ready-to-use EtherCAT masters solutions for Sitara processors. EtherCAT master on Sitara runs on different operating systems, including TI-RTOS and RT Linux. It also runs on the EMAC interfaces (CPSW and PRU ICSS_EMAC) of any Sitara device, including AM57x, AM437x, and AM335x.
This training series provides background on embedded systems startup to enable users of the AM3x/AM4x/AM57x Sitara processors to make choices that reduce boot time during system design of a selected processor. It introduces the boot time components of the catalog processors, system, and the Processor Linux Software Development Kit (PLSDK). It provides first steps and capabilities to reduce boot time using the Processor SDK without significant customization. This presentation also gives developers a look beyond just the initialization of the selected OS.
Creating a Robust Interface Between J6 and FPD-Link .
This workshop will support the following products - Tiva-C series, MSP430, C6000 and C28x. If you are an AM335x (ARM Cortex A8) user, almost 100% of what is covered in the workshop applies to this target as well with the exception of interrupts and timers. TI-RTOS is mostly target agnostic, so ANY user of ANY TI platform that supports TI-RTOS will learn a ton about the kernel (SYS/BIOS). Also, any Keystone (C66x) users will be able to learn SYS/BIOS in this workshop using the C6748 LCDK platform.