Similar to existing KeyStone-based SoC devices, the 66AK2Gx enables both the DSP and ARM cores to master all memory and peripherals in the system. This architecture facilitates maximum software flexibility where either DSP- or ARM-centric system designs can be achieved.
This curriculum provides an in-depth look at the K2G Processors, Processor SDK-Linux and TI-RTOS, and the Programmable Realtime Unit (PRU).
TI’s AM437x family, along with the Processor SDK, delivers unrivaled integration, scalability, peripherals and ease of use associated with the powerful Sitara processor platform. The Sitara AM437x processor architecture includes ARM® Cortex®-A9 cores, programmable real-time units (PRU), video and graphic accelerators, and customer-programmable secure boot make the AM437x processors unmatched in their class.
TI’s AM57x family, along with the Processor SDK, brings unrivaled integration, scalability, peripherals and ease of use associated with the powerful Sitara processor platform. Sitara AM57x processors' unique heterogeneous architecture including ARM® Cortex®-A15 cores, C66x DSPs, programmable real-time units (PRU), ARM Cortex-M4 cores, and video and graphic accelerators make the AM57x processors unmatched in their class.
TI’s AM6x Sitara processor family, along with the Processor SDK, brings unparalleled scalability, reliability, integration, and ease-of-use to the Sitara product line. The new, highly-integrated Sitara AM6x processor family provides industrial-grade reliability, with quad and dual Arm® Cortex®-A53 core variants built to meet the rapidly evolving needs of Industry 4.0 in factory automation and grid infrastructure.
Advanced closed-loop control systems for factory, process, and power automation markets require powerful MCU solutions that can interface to variety of industrial communications protocols. As new features and capabilities are added, these protocols may evolve several times during the lifetime of an industrial product. As a result, system providers can benefit from solutions that flexibly support multiple communications protocols and in-service updates without updating hardware.
TI’s TMS320C55x Fixed-Point Digital Signal Processors (DSP) enable high performance and low power through increased parallelism and total focus on power savings. Industry-leading active power enables computationally-intensive applications, such as voice triggering and encoding, to run on battery for extended period of time. Development tools include the award-winning eXpressDSP, Code Composer Studio (CCS), Integrated Development Environment (IDE), DSP/BIOS, optimized DSP and math libraries, and the industry’s largest third-party network.
Linux is well-adopted within embedded systems. But debugging Linux system issues can be overwhelming. This training series teaches the techniques of debugging kernel issues that may be encountered in embedded Linux systems. This training series explains the Linux kernel logging system and logging API, illustrates how to locate a particular device driver, and demonstrates how to read kernel oops logs.
Creating a Robust Interface Between J6 and FPD-Link .
This training series provides background on embedded systems startup to enable users of the AM3x/AM4x/AM57x Sitara processors to make choices that reduce boot time during system design of a selected processor. It introduces the boot time components of the catalog processors, system, and the Processor Linux Software Development Kit (PLSDK). It provides first steps and capabilities to reduce boot time using the Processor SDK without significant customization. This presentation also gives developers a look beyond just the initialization of the selected OS.
This training series provides an introduction to voice recognition and some of the basic concepts of audio systems that use voice as a user interface. It provides a guide to required components and how they match to embedded processors and other devices available from Texas Instruments. And it takes a look at the software, tools, designs, and demonstrations available from TI for building your own voice recognition and processing application.
This training presents TI’s ready-to-use EtherCAT masters solutions for Sitara processors. EtherCAT master on Sitara runs on different operating systems, including TI-RTOS and RT Linux. It also runs on the EMAC interfaces (CPSW and PRU ICSS_EMAC) of any Sitara device, including AM57x, AM437x, and AM335x.
This training series looks at High Availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP), which are fundamental to many of the tightly-synchronized, high-reliability systems being built today. HSR and PRP work together or separate to keep systems working even when things break so that power stays on and things keep getting built. Both of them work in the low levels of the Ethernet stack to provide the applications that they serve these fundamental capabilities.
In this training series, we demonstrate how to use the PRU-ICSS subsystem on a Sitara processor to interface between multiple SAR ADCs using SPI.
This training series provides an in-depth look at KeyStone multicore SoC devices.