Sort by:

44 Results

AM437x Sitara™ Processors Training Series

TI’s AM437x processors, along with the Processor SDK, deliver unrivaled integration, scalability, peripherals and ease of use associated with the powerful Sitara processor platform. The Sitara AM437xx processor architecture includes ARM® Cortex®-A9 cores, programmable real-time units (PRU), video and graphic accelerators, and customer-programmable secure boot make the AM437xx processors unmatched in their class.

AM4x Sitara Processors

The AM4x Sitara processors provide scalable ARM Cortex‐A9 solutions for automation, HMI, vision, imaging, and other industrial and high‐performance applications. This online training series includes an introduction to the AM4x processor family and the industrial .application support provided for devices in this class.

AM57x Sitara Processors

The AM57x Sitara processors provide scalable ARM Cortex‐A15 and C66x solutions for automation, HMI, vision, imaging, and other industrial and high‐performance applications. This online training series includes an introduction to the AM57x processor family, a technical deep dive into the capabilities of the SoC, and an overview of the multimedia and video capabilities.

AM65x Sitara Processors Flash Subsystem (FSS)

These training modules provide an introduction to the Sitara AM6x processor Flash Subsystem (FSS), which is used to interface to Octal SPI (OSPI) and HyperBus devices. 

AM65x Sitara Processors Overview

This section provides an overview of the AM65x Sitara processors for industrial application development.

AM6x Sitara™ Processors Training Series

TI’s AM6x Sitara processor family, along with the Processor SDK, brings unparalleled scalability, reliability, integration, and ease-of-use to the Sitara product line. The new, highly-integrated Sitara AM6x processor family provides industrial-grade reliability, with quad and dual Arm® Cortex®-A53 core variants built to meet the rapidly evolving needs of Industry 4.0 in factory automation and grid infrastructure.

AMIC110 Multiprotocol Industrial Interface for Closed-loop Delfino Control Systems Training Series

 Advanced closed-loop control systems for factory, process, and power automation markets require powerful MCU solutions that can interface to variety of industrial communications protocols. As new features and capabilities are added, these protocols may evolve several times during the lifetime of an industrial product. As a result, system providers can benefit from solutions that flexibly support multiple communications protocols and in-service updates without updating hardware.

Building an Industrial ARM Training Series

Building an Industrial ARM using Sitara AM6x Training Series

This training series looks at how Sitara AM-class devices are used to support processing in modern factory automation environments.

Customizing a Yocto-Based Linux Distribution for Production: Training Series

Every customer going to production with a Linux-based system wants a filesystem that is tailored to their system.  The filesystem provided with the Processor SDK is a great starting point that contains many popular applications and utilities.

Debugging Embedded Linux Systems

Debugging Embedded Linux Systems training series teaches the techniques of debugging kernel issues that may be encountered in embedded Linux systems. It explains the Linux kernel logging system and logging API, illustrates how to locate a particular device driver, and demonstrates how to read kernel oops logs.

Debugging Embedded Linux Systems Training Series

Linux is well-adopted within embedded systems. But debugging Linux system issues can be overwhelming. This training series teaches the techniques of debugging kernel issues that may be encountered in embedded Linux systems. This training series explains the Linux kernel logging system and logging API, illustrates how to locate a particular device driver, and demonstrates how to read kernel oops logs.

Decoding PRU-ICSS (hardware and software) for data acquisition

This video dives deeper into the details of the Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS). The programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, custom peripheral interfaces and the ability to offload tasks from the other processor cores of the SoC. The video also includes a comparison of PRU between different processors.

Designing Quick-Starting Embedded Systems Training Series

This training series provides background on embedded systems startup to enable users of the AM3x/AM4x/AM57x Sitara processors to make choices that reduce boot time during system design of a selected processor. It introduces the boot time components of the catalog processors, system, and the Processor Linux Software Development Kit (PLSDK). It provides first steps and capabilities to reduce boot time using the Processor SDK without significant customization. This presentation also gives developers a look beyond just the initialization of the selected OS.

EtherCAT® Master on Sitara™ Processors Training Series

This training presents TI’s ready-to-use EtherCAT masters solutions for Sitara processors. EtherCAT master on Sitara runs on different operating systems, including TI-RTOS and RT Linux. It also runs on the EMAC interfaces (CPSW and PRU ICSS_EMAC) of any Sitara device, including AM57x, AM437x, and AM335x.

Ethernet System on Sitara Processors Training Series

This training series provides an overview of the hardware and software elements of Sitara AM-class processors, including the AM57x, AM437, and AM335x. It also includes how-to videos that demonstrate how to implement Ethernet protocols, tools, and features on Sitara devices.

Ethernet System Overview

This section provides an overview of the hardware and software elements of Sitara AM-class processors, including the AM57x, AM437, and AM335x.

Flexible interface (PRU-ICSS) for data acquisition using multiple ADCs

This video showcases the PRU-ICSS interfaced to six 8-channel SAR ADCs (ADS8688), capturing data from all of the 48 channels at 32ksps/channel. Architecture of PRU implementation is demonstrated, achieving simultaneous sampling across multiple ADCs and coherent sampling to obtain high AC performance and minimal spectral leakage necessary for the data acquistion.

How to implement Ethernet on Sitara Processors

This section includes how-to videos that demonstrate how to implement various Ethernet protocols, tools, and features on Sitara AM-class devices.

How-to Videos

This section contains task-specific videos that demonstrate how to perform debugging techniques on embedded Linux systems.

HSR and PRP Redundancy on RT Linux Training Series

This training series looks at High Availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP), which are fundamental to many of the tightly-synchronized, high-reliability systems being built today. HSR and PRP work together or separate to keep systems working even when things break so that power stays on and things keep getting built. Both of them work in the low levels of the Ethernet stack to provide the applications that they serve these fundamental capabilities.

44 Results
arrow-topclosedeletedownloadmenusearchsortingArrowszoom-inzoom-out arrow-downarrow-uparrowCircle-leftarrowCircle-rightblockDiagramcalculatorcalendarchatBubble-doublechatBubble-personchatBubble-singlecheckmark-circlechevron-downchevron-leftchevron-rightchevron-upchipclipboardclose-circlecrossReferencedashdocument-genericdocument-pdfAcrobatdocument-webevaluationModuleglobehistoryClockinfo-circlelistlockmailmyTIonlineDataSheetpersonphonequestion-circlereferenceDesignshoppingCartstartoolsvideoswarningwiki