Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 2
Details
Date:
July 25, 2018
Let's take a deeper dive into the high speed multi-channel JESD204B compliant clocking solution. You will learn about the architecture and performance results with the 12-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling Analog-to-Digital Converter (ADC).
Additional information
This course is also a part of the following series
How to synchronize high speed multi-channel clocks?
Date: July 23, 2018
Aerospace & Defense Training Series
Date: April 22, 2016