12.1 Comparing high-speed analog-to-digital (ADC) and digital-to-analog (DAC) converter architectures
Description
August 2, 2017
This video is part of the TI Precision Labs – ADCs curriculum. A discussion of High-Speed Data Converter Architectures: First we discuss the basic architecture of a flash ADC stage, and then show how it is used as the core structure in more complex ADC architectures such as a pipelined ADC. Interleaved ADCs are discussed as well as Successive Approximation ADCs. Second the basic DAC core architectures are presented using current source and current sink implementations.
PDFs for download
Additional information
This course is also a part of the following series
Date: February 9, 2018
