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Webinar - Efficiently generating a negative output voltage with low noise
Hello and welcome to this webinar. Now to get the webinars started, here is Applications Engineer at Texas Instruments, Chris Glaser. Chris? Thank you, Molly. And thank you, Mauser, for hosting this webinar. In this webinar, we're going to discuss how to create a negative output voltage-- that is a voltage below ground-- and how to do this efficiently and with low noise at the output. Again I'm Chris Glaser, an applications engineer for TI based here in Dallas, Texas. We are going to look at some communications equipment and industrial markets in which applications need a negative voltage, and then look at the topology options for creating this negative voltage. And then look at a new topology, the inverting buck topology, and how it's noise is improved and efficiency is improved compared to the traditional inverted and buck-boost topologies and linear regulators. We're specifically going to focus on the 1 over f noise of the supply and how to eliminate that, and then show how this affects the signal chain and its performance. There are many applications that need a negative voltage. We see them in the wireless infrastructure, also known as the telecom or communications equipment market. And this is mainly for the high speed data converters, such as the RF sampling DAC, the DAC38RF80. And it has a current sink output, so they need the negative voltage to sink the current on the output stage. And again, you're going to find this in base stations, remote radio units, small cell, that sort of thing. As well, we see applications for gallium nitride transistors, in the PAs of these telecom equipments, in their bias for the the gate driver, as well as microwave backhaul. Similarly, we also see applications that require a negative voltage in test and measurement within the industrial space for all sorts of test equipment, as well as other military type applications, defense, you know, radar, electronic warfare, and so on. And all these applications also use these RF sampling data converters to get a very wide bandwidth on the signal they're measuring. And for these applications, they need a negative voltage in the system. There are several options to create this negative voltage from a positive voltage. The simplest is the inverting charge pump. This is for low currents, and it's also lower cost, because no inductor is required. The energy storage elements are purely capacitors. It does suffer from a lack of load regulation, as we'll see next. For higher currents, we can use a traditional inverting buck-boost switching DC/DC converter. And I'll note that a dedicated IC for this inverting function is relatively rare in the market. So many customers that I work with, many customers in the market, are using standard step-down buck converters as a voltage inverter. And again, this is very common, but does require a little bit of extra design effort, such as an application node or reference design to design a circuit and quantify the circuit's performance. And finally, when you're doing this with a buck converter, using it as an inverter, in many cases, the enable pin and other logic pins are shifted. Their ground reference is shifted, and we'll look at that here next. And many customers choose to follow a switching converter like the charge pump or inverting buck-boost converter with an LDO to clean up the DC/DC switching noise. And of course, this LDO is a linear element in the circuit, which is inefficient as another efficiency loss term in the equation, and it adds cost and size to the overall solution. A new option in the market is an inverting buck converter. This is a simple and efficient and dedicated IC for most low noise applications. And best of all, this type of converter does not require this post DC/DC LDO to clean it up. Now we look at each of these topologies in more detail, beginning with the charge pump. This LM2776 is an example of a simple inverting charge pump. You'll notice there's no inductors and that the output voltage is simply the negative of the input voltage. So you apply between 2.7 and 5 and 1/2 volts here at the input, and ideally, you get that same voltage but negative here at the output. The operating principle is to charge up this one microfarad flying capacitor to the level of input voltage and then move that voltage onto the output. So thereby, we can have an inverting function achieved. So at their most simplest operation, the inverting charge pump merely inverts the input voltage. It does not regulate the output voltage. The output voltage will be less than the input voltage in absolute value terms due to the output impedance of the charge pump. And most charge pumps will have a graph of this output impedance, for example, at 3.6 volts in and 100 milliamps here at room temperature, 25 C, we get an output impedance of a couple of ohms. And we can see this output impedance that work in the load regulation graph with 3.6 volts in, we do not get minus 3.6 volts out because of the output impedance. We get maybe around minus 3.3 volts. That's simply the output current times the output impedance, and we're going to get less than that at the output. And you can see, especially for higher load currents, this becomes more and more significant. The output impedance reduces the output voltage. Now this is still perfectly acceptable performance for many low current applications. If you just need a few milliamps to bias the reference or bias an op amp, this is the simplest way to do this. When you do need a regulated output voltage, or more power, or the ability to boost the input voltage above in absolute value terms the level of the input voltage, then we need an inverting buck-boost switching converter. This has a main transistor controlled by a PWM signal, which is going to operate with a duty cycle to regulate the output voltage. So in this topology, the output voltage is regulated above or below the level of the input voltage and inverted, of course. Now during the on time of the transistor, we're going to charge the inductor with current. And meanwhile, on the output, the load is supplied entirely by the output capacitor. So this is a key drawback of this topology is that during the on time, we are just charging the inductor while the output is being discharged. Therefore, we need to store the output power in the inductor over the time of 1 minus D, 1 minus the period. And so the peak power the inductor and the capacitor have to store, is going to be much greater than the output power. So this is going to make our peak currents be much higher in this inverting buck-boost topology than in a step-down topology, for example. So once we've stored enough energy in the inductor, we can open the switch, and then that stored energy is delivered to the load and to recharge the upper capacitor through this loop. Now since there are relatively few inverters in the market, many customers use a standard step-down converter, a buck converter, to create this negative voltage. They use it in the inverting buck-boost configuration, and we're going to see how that can be done. We have here the standard asynchronous buck converter on top and the standard, textbook inverting buck-booster converter on bottom. Now the easiest way to think about this is we just take the output terminals, the VOUT and ground terminal of the buck converter, and swap them. So we leave all the components the same, we just swap out the output terminals. And now I think you can see that these circuits are identical. All the nodes and nets are the same connection to the same components. So in this way we can use any step-down converter as an inverting buck-boost converter to create a negative voltage. Now this inverting buck-boost topology is a boost-based topology. In order to achieve higher currents or to boost the output voltage relative to the input voltage, and because of this boost-based topology, the switch current, the current in the switch and the inductor, is much greater than the output current. And this leads to higher peak currents, higher RMS currents in the system and therefore lower efficiency. As well, the boost-based topology introduces a right half plane 0, which is a big stability concern and limit on the bandwidth of the converter. And even if you cannot find a dedicated inverting buck-boost IC, you can use a standard step-down converter in the inverting buck-boost topology. And all the same considerations apply to this buck converter as well, because it is being used as an inverting buck-boost converter. So it is still a boost-based topology with a right half plane 0. All the circuit characteristics change when a buck is used as an inverting buck-boost converter. Therefore, there is typically an application note or references design to aid in the design of a buck converter as an inverting buck-boost converter. And one example of that is the level shifter, which might be needed for the enable pin. Here is an example of a level shifter on the enable pin. The SIS enabled signal is the ground reference signal from a GPIO pin of an MCU for example. And we need to shift that up to translate the enable pin on the top right there to go between a logic high, which is typically VIN, and a logic low level, which is now the negative output voltage of the inverting buck-boost converter. This is a very simple circuit. You can find these two signal transistors in a single package. That's fairly small and simple. But it is extra effort required on the design side. Two examples of buck converters used as inverting buck-boost converters are these two TI designs. They are TI reference designs. And each of these actually uses a buck power module with integrated inductor to perform the inverting buck-boost function. So you can see here, the output terminals are reversed. The out of the IC is connected to ground, and the ground of the IC is connected to minus VOUT. And this why we need that level shifter for the enable pin if we want to control that with a GPIO pin, because now it is referenced to the ground pin of the IC, which is at the minus VOUT logic level. Or we can simply tie it to VIN to keep the converter always on as shown in these pictures. And these two references designs, again, make minus 1.8 volts for telecom, and these are RFC [INAUDIBLE] data converters, and then a standard minus 5 volt out 1 on the bottom. And both of these give 2 amps and 1 and 1/2 amps, which is significantly more than the couple hundred milliamps given by the charge pump solutions. With any of these switching DC/DC converters, many customers will instinctively follow those with an LDO to clean up the noisy DC/DC. For example, that LM2776 has an LM27761, which is the same inverting charge pump with an integrated negative LDO in the same package. Or the TPS7A90 is a discrete LDO for positive voltages as shown in this picture. So the in pin would be provided from a upstream DC/DC converter, and then you can see the output going to this ADC, this data converter and this clock. Now LDOs clean up noisy DC/DCs through their dropout voltage. And dropout voltage is the voltage differential between the in and the out of the LDO. And typically you'll see this specified as around 500 millivolts in the LDO data sheets for the good noise performance. Of course, this dropout is the drop across the LDO, which is a voltage drop at the load current of the LDO. And this is a direct power loss and inefficiency to the system. For example, a 3 volt LDO creating 2 and 1/2 volts will be at most 83% efficient. And again, you have to multiply this by the efficiency of the upstream DC/DC, which is maybe 80% or 90% for a positive. That may be around 80% for a negative DC/DC that you'll get an overall under 70% efficient solution. As well at half an amp output current, for example, this is a quarter watt of loss in the system in just this LDO. And here is the PSRR, the power supply rejection ratio, or power supply ripple rejection graph, for the 7A90 LDO. And you can see immediately the different curves are for different input voltages. So this is showing the effect of that dropout voltage on the LDOs noise characteristics. You can see the output voltage is fixed at 3.3, and we have from the purple curve at 3.5 volts in to the gray curve there the top at 4.3 volts in, a dropout voltage between 200 and a millivolts and 1 volt. And you can see clearly that you get about 20 dB less ripple rejection, noise rejection when you use the lowest possible dropout level. So first of all, when designing with the LDO, be careful to not minimize your dropout to increase the efficiency, because that will be at the expense of your noise rejection of the LDO. A second point about LDOs is the filtering of the DC/DC may not be as good as you think it might be. You can see here that after about 1 megahertz, the PSRR of the LDO drops off dramatically. And modern DC/DC converters, especially lower power ones, typically switch above a megahertz, maybe 2 megahertz or 3 megahertz, somewhere in there. So you're not going to get the 20 or 30 dB of ripple rejection from the LDO at the switching frequency. Rather, LDOs are very good, at least the low noise ones with their NR pin, noise reduction pin, at filtering out the 1 over f, or the flicker noise or the very low frequency noise created by the bandgap of the DC/DC. You can see you're getting about 50 or 60 dB of PCRR there. So this is where LDOs can really add their value is filtering out this very low frequency noise, which is very difficult to filter in the rest of the system. And finally this LDO, in addition to adding the inefficiency and cleaning up the noise a little bit, will add cost and size to the overall solution. Now we're going to look at the inverting buck topology, which is a new topology we released a few months ago here at TI. This is the simplified schematic of the topology. We have a half bridge stage, a driving A flying capacitor to a synchronous rectifier, followed by a LC filter as in a step-down converter. So during the first stage, the capacitor will be charged to the input voltage, and then we're going to invert that voltage and run it through the LC filter to reduce the ripple created by the switching. And we have the ability to feed back the out to a control loop driving these transistors. And so we can adjust the duty cycle to create a regulated output voltage. And this LC filter is just as in a step-down or buck converter, and so it's going to give a minus 2 decade-- a minus 40 dB per decade roll off, a very strong continuation of the switching frequency to create a low ripple at the switching frequency at the output. And you'll notice here that this is kind of divided into halves. The left half is simply an inverting, almost a charge pump stage. And the right half is the LC filter, like in a buck converter. And so we call this the inverting, for the first stage, buck, for the second stage, converter. And because it's an inverting buck converter and not an inverting buck-boost converter, we can only reduce the level of the input voltage to create a lower, in absolute value terms, output voltage. So this is not performing the inverting buck-boost function, but merely an inverting buck function. Looking at the topology a little bit more in detail with the waveforms at the right, we can see the path when the switches are closed and charging the flying capacitor to the level of the input voltage and ramping up the inductor current close to the ground. And then these, which has changed states, and now we discharge the flying capacitor into the load and recharge the inductor. So you'll notice here that the inductor always has current flowing through it, and that's always being delivered to the load. So this is a key point of this topology is we have a continuous inductor current, which means low peak currents, low RMS currents and high efficiency, as well as we're not having the high frequency noise on the output as we do in the inverter buck-boost topology. As well, by using a peak current mode control PWM technique here, we can operate with fixed frequency, which is appreciated in signal chain applications. And as well, we have synchronous rectification here, so no diodes used, so we can force continuous connection mode even at low or light loads. So we can allow the inductor current to reverse when needed to support the constant frequency operation. There is no power save mode in this device. Again, this is appreciated for the typical data converter application, which requires lowest noise. In addition to having a low noise switching ripple, we also did some really special things to the 1 over f noise coming from the bandgap. So you can see the bandgap creates its 1 over f, or flicker noise, and then we're going to gain that up a little bit here with this gain stage, and of course that's going to gain up the noise, but, as well, with the selection of these two resistors between VREF and feedback. That's how the customer programs the outage voltage at that point. After that gain, we're going to filter that very strongly with an RC filter. And you can see the capacitor there is a 1 microfarad external. And this is the exact same function as the NR, or noise reduction pin of an LDO. The resistor's internal, and the customer adds a capicator external to get the desired level of filtering of the 1 over f noise. Then we have a very, very small gain stage after that to regulate the output voltage. And so at the end of the day, we get a very clean signal without 1 over f noise. So to summarize this inverting buck topology, we achieve low noise by filtering the bandgap like this, as well as having the low pass LC output filter. And here are some more details on this TPS63710 inverting buck device. It is a 1 amp output current inverter. So again, being an inverting buck converter, we don't need to consider the peak current as in a boost topology. We simply can consider the output current, and this is 1 amp across the load range. Accepts up to 14 volts on the input, up to 91% efficiency, which is very, very good for any sort of negative voltage creating converter. And we receive this through synchronous rectification. And it has this low noise reference system and a low switching ripple at the output. The 1 and 1/2 megahertz fixed frequency PWM mode and the reasonably small 3 x 3 QFN package make this easy to use. Again, this is an ideal solution for any sort of data converter, specifically the DAC 38RF80 family, the RF sampling DAC, and the successor AFE768 family, as well as Gallium Nitride bias, and just general purpose industrial negative rails. Now we'll look at how this integrating buck topology compares to the traditional inverting buck-boost topologies and LDOs. To summarize, the inverting buck topology gives us the advantages of having a continuous output current. This is going to make a low output voltage ripple, and no right half plane 0, which is going to allow us to have a higher control bandwidth for fast transient response. And the continuous output current also gives us a lower inductor current, which is going to be higher efficiency due to the lower peak currents. The main disadvantage I mentioned before is this duty cycle limit. Being an inverting buck converter, we can only reduce the input voltage to a lower, in absolute terms, output voltage. And 70% is the value we'll get for that, and that can vary a little bit based on your exact application needs. But 70% is a good starting point to use. And finally, we do require a flying capacitor in this topology, and we specify that as 4 microfarads minimum effective capacitance. While this may not seem like a lot, this capacitor has to carry the full input voltage, which can be up to 14 volts, as we saw. And so the capacitance lost from the DC bias effect can be quite severe at 14 volts. So you have to use two or three 10 microfarads capacitors to get this 4 microfarads effective, depending on your input voltage. Looking at the stimulation of output voltage ripple for the inverting buck topology compared to the inverting buck-boost topology under the same conditions, we see clearly its much lower ripple at the output, as expected from the continuous output current. And here's a real lab measurement of the two topologies side by side. You can see it's a little bit lower, under 10 millivolts for the inverting buck converter. And while not as drastic as the previous page, we have to look at the test conditions used here, specifically the output filter. So the inverting buck converter used a 2.2 microhenry and 322 microfarad output caps, while the inverting buck-boost converter with its higher peak currents had to use a 3.3 microhenry and 100 microfarad output capacitor. So with a twice as strong filter, we still get higher noise than the inverting buck topology with the traditional inverted buck-boost topology. The transient response is much faster with less overshoot as well for the inverting converter as expected due to the higher bandwidth, because we do not have the right half plane 0. Looking at a real transient response measurement of the inverting buck converter, we can see less than 10 millivolts deviation, which is really, really good on a minus 5 volt output. In addition to the low noise, the telecom and industrial applications typically very much value high efficiency due to the lower heat, lower system challenges that provides. So there's the efficiency comparison of these three solutions, the inverting buck topology, the traditional inverting buck-boost topology, and the even more common inverting buck-boost topology followed by an LDO. And you can see that LDO gives under 50% overall efficiency. And this is simply because the lack of inverting buck-boost converters in the market is also matched by a lack of inverting LDOs in the market. To get a low noise, high current LDO that makes the negative voltage is fairly rare. And so we have to use at least 3 volts on the input to get minus 1.8 volts output. And this is going to make a maximum of 60% efficiency in the LDO itself. So you multiply that by the 80% efficiency of the upstream inverting buck-boost converter, and you get the overall 48% efficiency of the entire power conversion system. And even if 48% efficiency is acceptable, the 2 watts of power loss that creates in the system may not be, compared to the quarter watt of loss from the inverting buck topology. So clearly the power dissipation is a concern as well, especially in the telecom base station market. You've got to spend even more energy to get that heat out of your system and make it reliable and lasting for many years. So focusing now on the 1 over f noise, which is typically measured from about 1 or 10 hertz to 100 kilohertz, that kind of band, we compared the 1 over f noise of the three circuits with the high SP and the inverting buck converter, of course. The LDO knocks that down due to it's NR pin, and so we get lower noise there. But the inverting buck topology gives us lowest overall noise. Comparing the data sheet graphs of a low noise LDO, the 7a8001, to the inverting buck converter, we can see about, what is it, 46 microvolts RMS noise for the LDO. And it's, I believe, 33 microvolts RMS noise for the buck converter. And looking at this exact area here to start with, we can compare point to point. At 10 hertz, we get 3 microvolts per root hertz of noise on the LDO, and 1 microvolt per root hertz with the inverting buck converter. And we have an even stronger roll off with frequency with the inverting buck converter, such that at 1 kilohertz, we get half a microvolt per root hertz of noise at the LDO. And just 0.03 microvolts per hertz with the inverting buck converter. In that lower 1 over f noise, it's a primary driver of the signal chain application. The noise in that frequency band is very hard to filter otherwise if you don't get it at the bandgap. If you wait till that's on the power rail itself, you're going to have to use a very, very large filter to get rid of it, as we'll see. This is an example of a data converter, a DAC, and its phase noise measurement. In black, you'll see the linear regulator, the LDO, and in red, a normal DC/DC converter. Now you can disregard the spikes. That's just artifacts of the test and not important to this discussion. But what is important is the noise is around 10 kilohertz, which is clearly pointing to one 1 over f noise. This is not near our switching frequency at all, this is simply from the internal bandgap and that flicker noise created. Now the solution to this can be, on this particular rail for this particular data converter, the current was low enough that we could use an RC filter to get rid of it. The voltage drop across the resistor and the power loss was small enough to be acceptable in a circuit. You can see we had to use a 1 ohm and 220 microfarad capacitor to form a filter with a low enough cutoff frequency to block this noise, and we still don't get quite as low as the LDO in this system. So if your system application allows it, you can use a large filter, like an RC or LC, to reduce this 1 over f noise. Or you can use an LDO, or you can use a low noise inverting buck converter to do the same function with higher efficiency and less BOM cost. And I'll spend the last few minutes here looking at an overview of the inverting devices that are most useful to you. Here is the list. The TPS63710 is the inverting buck converter we discussed in this presentation, again, delivering 1 amp of output current. The TPS63700 is the inverting buck-boost converter. You can see the output voltage goes down to minus 15, while the input voltage only goes to 5 and 1/2. This is an inverted buck-boost converter. It can boost the output voltage, and this gives about 360 milliamps at the output. The rest of the solutions are these inverting charge pumps, again, which are very useful for low current applications that just need to be simple. So we have the LM2776 family. The LM2776 is just the inverting charge pump. We can see it used in a few TI designs, reference designs, here are at the bottom. When you add the 1 to the end of the part number, you get the integrated negative LDO, and you can see that being used in a few of these RF sampling data converter applications that can accept just 250 milliamps output current. Adding a 2, you now get two LDOs, one for a positive rail, one for a negative rail, to get a bipolar or plus minus output. And we see applications for this especially in headphones. And here's that list of devices again. And thank you for attending this webinar, this training session. I'll turn it back over to Molly. Great thanks, so much. OK, we have about 25 minutes for questions. So Chris, our first question, why is this device called an inverting buck converter? Yeah, so this is an inverting buck converter as opposed to an inverting buck-boost converter. I want to go back to the main slide here to show that. There we go. Yes, and so the left half of the circuit is this inverting charge bump stage with the capacitor. And the right half is the LC output filter, just like in a step-down inverter. So it's inverting the input voltage and then filtering it like a buck converter, so we call it an inverting buck converter. OK, great. And our next question, can the TPS63710 convert plus 5 volts to negative 5 volts? That's the most common application I see for these inverters, and the answer is, unfortunately, no. Because it is an inverting buck topology, we always have to have that duty cycle limit, that limit on the out to be some level less than the input voltage. So to get minus 5 from 5 is not going to be achievable. But if you want minus 3.3 from 5, that should be good. And other common configurations in these data converter applications typically require a lower level of output voltage, like minus 1.8 or minus 2.5 or something, which is generally achievable for most input voltages that I see in most of the systems. And our next question, why does the inverting buck topology not have a right half plane 0? Yeah, that right half plane 0 is important as well for this topology. It does not have one, to repeat. Yeah, so, because we charge the flying capacitor during the on time and also deliver energy to the output through the inductor during that same on time, there's no right half plan 0. They're in-phase. The delivery to the output is in-phase with the charging of the inductor on the capacitor. So we don't have that phase inversion that comes with the inverting buck-boost topology. Next question, could you please explain the transition from CT to SW? Yes, so you see this picture again, we're going to charge that CFLY. M1 is connecting that CFLY to VIN, and then M3 there on the bottom in the middle is connecting switch SW to ground. So the CFLY will have the level of the input voltage, VIN, across its terminals. Then we change states. So the M1 and M3 open, and M2 closes to connect now CP to ground. And if you remember that CFLY had VIN across its terminals, so now switch becomes minus VIN. Because we can't change the voltage across the capacitor instantaneously, so we level shift that voltage down to the minus VIN and put that on switch. And now we can filter do that with the LC filter. This is just like done in an inverting charge pump, where we charge the flying capacitor to the level of the input voltage and then invert that put it on the output. And is there is a device on this topology with more range of VIN, VOUT? In particular they're looking for an 18 bulk in and a negative 12 volt out device. Correct, this is the first device we have. And so there are no other options as of today's date. Yeah, 18 to 12 would probably be a much higher power device as well. OK, and our next question, I just need a few MA of current to bias an OP amp. What is the best solution? [LAUGHS] Yes, so to bias an op amp, it really-- the most useful thing, the simplest thing is the inverting charge pump. So if you just need a few milliamps of current and you're OK with that load regulation from a charge pump, then that's the way to go. OK, great. Well at this time, we don't have any further questions. Certainly if anyone out there does have any additional questions, feel free to submit them through the Q&A box. And even once the webinar is over, Chris will still be receiving those questions and able to reach out with any answers at that time. So we're going to go ahead and wrap this webinar right here. Thank you all for spending some time with us today. Thank you for joining us for Efficiently Generating a Negative Output Voltage with Low Noise. Enjoy the rest of your day.
Description
December 12, 2017
What you will learn in this webinar:
How to achieve a low noise at a negative output voltage with the inverting buck topology
Understanding how the buck output stage and filtered reference voltage attenuate noise
The elimination of LDOs when powering data converters by utilizing these low-noise features
Explanation of both low-noise circuits which achieve low output voltage ripple and low 1/f noise
Additional information
Learn more about TPS63710
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