High Voltage Seminar

電子郵件

3.3 Gate Driver Design - from Basics to Details

描述

2018年 10月 1日

This in-depth discussion will cover how to drive state-of-the-art power transistors and key design considerations that our customers face. Topics will include: parasitic influences, hard switching vs soft switching, non-linear junction capacitance (CRSS, COSS), common-mode transient immunity (CMTI), turn-off negative bias, and separating power/ground noise. We will also discuss how TI's gate driver portfolio is addressing the challenges of driving these new transistor technologies.

PDFs for download

其他資訊

This presentation will cover how to drive state-of-the-art power transistors and key design considerations. Topics will include: Parasitic influences, hard switching vs soft switching, non-linear junction capacitance (CRSS, COSS), common-mode transient immunity (CMTI), turn-off negative bias, separating power/ground noise, and trade-offs between different isolated DC/DC topologies for powering gate drivers.

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