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KeyStone ARM & DSP Multicore Device Training Series

This training series provides an in-depth look at KeyStone multicore SoC devices.

1. KeyStone Architecture

This section provides an introduction to the functional architecture of the C66x DSP + ARM embedded processors, as well as the DSP and ARM cores and the Instruction Set Architecture (ISA).
# 標題 時間長度
1.1 KeyStone I C667x DSP SoC Architecture Overview
This module provides a high-level view of the KeyStone I C667x device architecture, the processing and memory topologies, acceleration and interface i...
1.2 KeyStone I Training: C665x SoC Overview
The KeyStone C665x Architecture Overview provides a high-level view of the C665x device architecture, the processing and memory topologies, acceleration...
10:26
1.3 KeyStone II DSP+ARM SoC Architecture Overview
This module provides a high-level view of the device architecture, including the C66x DSP and ARM Cortex-A15 processors, memory and transport topologies,...
1.4 KeyStone I training: C66x CorePac overview - achieving high performance
CorePac: Achieving High Performance discusses how high performance can be achieved within each DSP core. Topics include CorePac architecture, Single Instruction...
31:03
1.5 KeyStone I training: instruction set architecture (ISA)
C66x Instruction Set Architecture describes the differences between the TMS320C674x instruction set architecture and the TMS320C66x instruction set included...
30:57
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2. KeyStone Memory and Transport

This section provides information about the memory and transport architectures of the C66x DSP + ARM embedded processors.
# 標題 時間長度
2.1 KeyStone I training: memory and cache
CorePac & Memory Subsystem provides a detailed look at the C66x memory subsystem including the Multicore Shared Memory Controller (MSMC), local & shared...
01:01:07
2.2 KeyStone I training: multicore navigator overview
Multicore Navigator Overview provides an introduction to the architecture and functional components of the Multicore Navigator, which includes the Queue...
36:36
2.3 KeyStone I training: multicore navigator - queue manager subsystem (QMSS)
Multicore Navigator: Queue Manager Subsystem (QMSS) provides a detailed look at the functional elements of the QMSS and provides information on programming...
28:22
2.4 KeyStone I training: multicore navigator - packet DMA (PKTDMA)
Multicore Navigator: Packet DMA (PKTDMA) provides a detailed look at the infrastructure and functional aspects of the PKTDMA and provides information on...
32:16
2.5 KeyStone I training: introduction to interprocessor communication (IPC)
Introduction to Interprocessor Communication (IPC) provides an overview of the hardware and software that transports data and/or signals between threads...
40:28
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3. KeyStone External Interfaces

This section provides training on the external interfaces of the C66x DSP + ARM embedded processors.
# 標題 時間長度
3.1 KeyStone I training: network coprocessor (NETCP) overview
Network Coprocessor (NETCP) Overview provides an introduction to the NETCP, which includes the Packet Accelerator (PA), Security Accelerator (SA), and...
04:20
3.2 KeyStone I training: NETCP - packet accelerator (PA)
NETCP Packet Accelerator (PA) takes a look at the motivation behind the PA, the hardware, firmware and low level drivers, as well as a programming use...
26:36
3.3 KeyStone I training: NETCP - security accelerator (SA)
NETCP Security Accelerator (SA)takes a look at the motivation behind the SA, the firmware and low level drivers, as well as a usage case for IPSec encryption...
15:45
3.4 KeyStone I training: I/O interfaces
I/O Interfaces provides an overview of selected external interfaces on the C66x devices including UART, I2C, SPI, TSIP and EMIF-A.
22:05
3.5 KeyStone Serial Rapid IO (SRIO)
This module takes a look at the new features and enhancements of the SRIO on KeyStone devices.
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4. KeyStone Wireless Accelerators and Co-Processors

This section provides an overview of the wireless accelerators and co-processors on C66x DSP + ARM embedded processors.
# 標題 時間長度
4.1 KeyStone I training: antenna Interface V2 (AIF2)
Antenna Interface V2 (AIF2) provides an overview of the architecture and features of AIF Version 2.
01:17:03
4.2 KeyStone I training: fast fourier transform coprocessor (FFTC)
Fast Fourier Transform Coprocessor (FFTC) presents the architecture and features of the FFT Coprocessor.
25:22
4.3 KeyStone I training: turbo decoder co-processor (TCP3D)
Turbo Decoder Co-Processor (TCP3D) provides an overview of TCP3D including key features, modes, drivers, and configuration. Examples are provided.
45:16
4.4 KeyStone Turbo Encoder Co-Processor (TCP3E)
This module provides an overview of TCP3E including usage, initialization, and configuration. Examples are provided.
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5. KeyStone Software and Tools

This section introduces various software and tools on C66x DSP + ARM embedded processors.
# 標題 時間長度
5.1 KeyStone I training: multicore software development kit (MCSDK) overview
This session provides an introduction to and overview of the MCSDK.
17:42
5.2 KeyStone I training: bootloader overview
This training provides an overview of the bootloader used by the KeyStone I architecture devices.
20:54
5.3 KeyStone I training: power management
Power Management provides an overview of the C66x power domain topology, power-saving features, power and clocking domains, powers states, and Smart R...
24:26
5.4 KeyStone I training: debug overview
Debug Overview introduces the C66x debug features including triggers, statistics, and traces.
42:10
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6. KeyStone Demonstrations

This section includes demonstrations for software and hardware processes performed on KeyStone devices.
# 標題 時間長度
6.1 Restoring Factory Default Images on KeyStone II Platforms
This video demonstrates how to restore the factory default images on KeyStone II evaluation platforms with no SD card including K2E, K2H, K2K, and K2L...
06:30
6.2 Demonstrating U-Boot from SPI/QSPI for 66AK2G
This video demonstrates how to boot the 66AK2Gx processor using SPI NOR and QSPI flash.
05:58
6.3 Demonstrating Voice Preprocessing on the EVMK2G
This video demonstrates the voice pre-processing TI design for the EVMK2G platform.
06:05
6.4 Getting Started with the EVMK2EX Development Board for 66AK2Ex and AM5K2Ex Processors
The XEVMK2EX is a full-featured development tool for 66AK2Ex and AM5K2Ex KeyStone II-based SOCs. Get started developing general purpose embedded processor...
04:21
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7. Processor SDK for TI Embedded Processors

# 標題 時間長度
7.1 Introduction to the Processor SDK Training Series
This short video provides an introduction of the Processor SDK training series including how to access and a curriculum overview.
02:32
7.2 Processor SDK Overview
This module provides an introduction to the Processor Software Development Kit (SDK), the next generation unified software platform for TI’s newest processor...
7.3 Introduction to Processor SDK RTOS Part 1
This module is the first installment of a two-part overview of the Processor SDK from the TI-RTOS perspective. It introduces the functional elements that...
7.4 Introduction to Processor SDK RTOS Part 2
This module is the second installment of a two-part overview of the Processor SDK from the TI-RTOS perspective. It examines the functional elements that...
7.5 Application Development Using Processor SDK RTOS
This presentation provides a detailed overview of the application development process using the Processor SDK RTOS release. It walks through each step...
7.6 Processor SDK Linux Overview
This module takes a look at the purpose of the Processor SDK for Linux, how it is designed to provide flexibility and re-usability, and how the kit creates...
7.7 Processor SDK Linux Components
This module provides an introduction to the functional components included in the Processor SDK for Linux and describes how these components can be used...
7.8 Processor SDK Linux Matrix Application Launcher Overview
This module explains the purpose of the Matrix, an example application that launches by default within the Processor SDK for Linux. The capabilities of...
7.9 Processor SDK Linux Installation, Documentation, and Training
This module identifies the resources needed to obtain and install the Processor SDK for Linux. It also provides an overview of supporting documentation...
7.10 Introduction to OpenCL on TI Embedded Processors
This module provides an overview of OpenCL, the benefits it can provide during application development, and the criteria to consider for using OpenCL on...
7.11 Introduction to Inter-Processor Communication (IPC) for KeyStone and Sitara™ Devices
The IPC software package is designed to hide the lower-layer hardware complexity of multi-core devices and help users to quickly develop applications
7.12 Setting Up and Testing Processor SDK RTOS Device Drivers
This video demonstrates how to setup and test device drivers included in the Processor SDK RTOS package.
05:44
7.13 Introduction to the Sitara™ AM57x Processor Industrial Software Development
This training provide an overview of the AM57x Industrial SDK architecture.
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