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PRU-ICSS: Interfacing a processor with multiple ADCs

描述

2018年 4月 27日
Select TI processors feature a unique subsystem, called the Programmable-Real-Time Unit Industrial Communications Subsystem (PRU-ICSS). This enables the integration of real-time industrial communications protocols and eliminates the need for an external ASIC or FPGA. This video demonstrates how the PRU-ICSS subsystem can provide flexible interface between the processor and multiple Analog-to-Digital Converters (ADCs) to enhance data acquisition performance. 

其他資訊

This course is also a part of the following series

Date: 九月16日2016年
Date: 六月23日2017年
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