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注意:各項之間請以逗號分隔

例如 , 10/24/2021

例如 , 10/24/2021

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28 結果

Frequency planning and loop filter design using CDCE62005

日期:
2014年 11月 1日

時間長度:
04:14
Planning and loop filter design is now easy using the latest tools available in the CDCE62005 GUI.

Clock Design Tool - Getting Started

日期:
2014年 11月 2日

時間長度:
11:48
Dean introduces TI's Clock Design Tool and its easy-to-use graphical user interface

Clock Design Tool - Device Simulation

日期:
2014年 11月 2日

時間長度:
08:53
Dean shows clock device simulation using TI's easy-to-use Clock Design Tool.

Clock Design Tool - Loop Filter Design

日期:
2014年 11月 2日

時間長度:
05:31
Dean shows how to use TI's Clock Design Tool to quickly do PLL loop filter design. TI Clock Design Tool software is used to aid part selection, loop filter des

LMK04800 Clock Jitter Cleaner/Distribution Demo

日期:
2014年 11月 2日

時間長度:
05:23
Alan demonstrates the LMK04800 clock jitter cleaner and distribution family including: * Ultra-Low RMS Jitter Performance using low-cost external crystal

LMK04826/8: JESD204B-compliant clock jitter cleaners

日期:
2014年 11月 8日

時間長度:
10:39
Timothy demonstrates how to use the LMK0482x devices in JESD204B applications and illustrates the benefits of designing with the JESD204B interface.

LMK04826/8: 时钟抖动消除器(兼容 JESD204B)

日期:
2014年 11月 8日

時間長度:
10:39
Timothy 演示如何在 JESD204B 应用中使用 LMK0482x 系列产品,举例说明在设计中使用 JESD204B 接口的好处,并重点介绍 LMK0482x SYSREF 时钟生成特性。

Utilizing JESD204B interface in low cost applications

日期:
2014年 11月 8日

時間長度:
02:47
Get an overview of the 4-channel, 50-MSPS DEV-ADC34J22 evaluation module. The board features TI's ADC34J22 ADC, LMK04828 jitter cleaner and THS4541 fully diffe

Program Clock Distribution Circuits - ClockPro

日期:
2014年 11月 8日

時間長度:
01:47
Learn how to program TIClock Pro and TI Clock distribution circuits using ClockPro software.

Optimize System Performance and Design Time with the LMK03328 Ultra-Low-Jitter Clock Generator

日期:
2015年 9月 28日

時間長度:
07:12
Deepa shows us how easy it is to implement the LMK03328 features in your system design.

Introduction to TI’s rad hard Space Products

日期:
2016年 6月 28日

時間長度:
03:30
Get to know the industry’s largest portfolio of rad hard products and design resources for space flight.

TX Signal Chain Implementation for Wide Band and High Frequency Signal Generation

日期:
2016年 11月 10日

時間長度:
13:45
The system design for an arbitrary waveform generator (AWG) and its functional blocks, including a discussion of the AWG amplifier path and design methodology.
LMK03328EVM setup

LMK03328 EVM Setup and Programming with TICS Pro GUI

日期:
2017年 1月 13日

時間長度:
08:50
EVM setup and programming using TICS Pro GUI with WEBENCH clock design report to configure and program the device.  The video also covers frequency planning tec
LMK03328 Frequency Margining

LMK03328 Frequency Margining and EEPROM programming with TICS Pro GUI

日期:
2017年 1月 13日

時間長度:
04:41
LMK03328 frequency margining example for generating multiple frequency plan configurations (nominal, margin high, and margin low) and programming these to the E

Get Your Clocks in Sync: Software Setup

日期:
2017年 8月 7日

時間長度:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers

Get Your Clocks in Sync: Hardware Setup

日期:
2017年 8月 14日

時間長度:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

Get Your Clocks in Sync for JESD204B Data Converters

日期:
2017年 9月 6日

時間長度:
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.

Hitless Switching with DPLL Network Clock Synchronizers from TI

日期:
2018年 3月 27日

時間長度:
01:18
Hitless Switching: Watch how our innovative phase cancellation eliminates phase hits in clock applications.

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 1

日期:
2018年 7月 17日

時間長度:
07:50
Learn about the high speed multi-channel clocking requirements and challenges.

How to synchronize high speed multi-channel clocks?

This training explains how to synchronize high speed multi-channel clocks used in high-speed end equipment with multi-channel transceiver system.
28 結果
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