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例如 , 10/28/2021

例如 , 10/28/2021

注意:各項之間請以逗號分隔

例如 , 10/28/2021

例如 , 10/28/2021

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28 結果

Utilizing JESD204B interface in low cost applications

日期:
2014年 11月 8日

時間長度:
02:47
Get an overview of the 4-channel, 50-MSPS DEV-ADC34J22 evaluation module. The board features TI's ADC34J22 ADC, LMK04828 jitter cleaner and THS4541 fully diffe

TX Signal Chain Implementation for Wide Band and High Frequency Signal Generation

日期:
2016年 11月 10日

時間長度:
13:45
The system design for an arbitrary waveform generator (AWG) and its functional blocks, including a discussion of the AWG amplifier path and design methodology.
TI's bulk acoustic wave (BAW) clocking technology

TI's Bulk Acoustic Wave Clocking Technology

日期:
2019年 2月 25日

時間長度:
03:02
This video details TI’s Bulk Acoustic Wave (BAW) clocking technology, optimized to improve network performance, reduce BOM and increase immunity to interference

TI's Bulk Acoustic Wave Clocking Technology

日期:
2019年 2月 22日

時間長度:
03:02
This video details TI’s Bulk Acoustic Wave (BAW) clocking technology, optimized to improve network performance, reduce BOM and increase immunity to interference

TI Precision Labs - Clocks and timing: System design considerations

This video series will cover clocks and timing system design considerations such as clock tree design, frequency planning and noise reduction.

TI Precision Labs - Clocks and Timing: Clocking JESD204B/C Systems

日期:
2020年 6月 30日

時間長度:
10:07
Clocking JESD204B or JESD204C systems.

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 3

日期:
2018年 7月 25日

時間長度:
11:22
Learn about the high channel count clocking solution.

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 2

日期:
2018年 7月 25日

時間長度:
09:56
Learn about the JESD204B compliant high speed multichannel synchronized clocking architecture

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 1

日期:
2018年 7月 17日

時間長度:
07:50
Learn about the high speed multi-channel clocking requirements and challenges.

Program Clock Distribution Circuits - ClockPro

日期:
2014年 11月 8日

時間長度:
01:47
Learn how to program TIClock Pro and TI Clock distribution circuits using ClockPro software.

Optimize System Performance and Design Time with the LMK03328 Ultra-Low-Jitter Clock Generator

日期:
2015年 9月 28日

時間長度:
07:12
Deepa shows us how easy it is to implement the LMK03328 features in your system design.

LMK04826/8: 时钟抖动消除器(兼容 JESD204B)

日期:
2014年 11月 8日

時間長度:
10:39
Timothy 演示如何在 JESD204B 应用中使用 LMK0482x 系列产品,举例说明在设计中使用 JESD204B 接口的好处,并重点介绍 LMK0482x SYSREF 时钟生成特性。

LMK04826/8: JESD204B-compliant clock jitter cleaners

日期:
2014年 11月 8日

時間長度:
10:39
Timothy demonstrates how to use the LMK0482x devices in JESD204B applications and illustrates the benefits of designing with the JESD204B interface.

LMK04800 Clock Jitter Cleaner/Distribution Demo

日期:
2014年 11月 2日

時間長度:
05:23
Alan demonstrates the LMK04800 clock jitter cleaner and distribution family including: * Ultra-Low RMS Jitter Performance using low-cost external crystal
LMK03328 Frequency Margining

LMK03328 Frequency Margining and EEPROM programming with TICS Pro GUI

日期:
2017年 1月 13日

時間長度:
04:41
LMK03328 frequency margining example for generating multiple frequency plan configurations (nominal, margin high, and margin low) and programming these to the E
LMK03328EVM setup

LMK03328 EVM Setup and Programming with TICS Pro GUI

日期:
2017年 1月 13日

時間長度:
08:50
EVM setup and programming using TICS Pro GUI with WEBENCH clock design report to configure and program the device.  The video also covers frequency planning tec

Introduction to TI’s rad hard Space Products

日期:
2016年 6月 28日

時間長度:
03:30
Get to know the industry’s largest portfolio of rad hard products and design resources for space flight.

How to synchronize high speed multi-channel clocks?

This training explains how to synchronize high speed multi-channel clocks used in high-speed end equipment with multi-channel transceiver system.

Hitless Switching with DPLL Network Clock Synchronizers from TI

日期:
2018年 3月 27日

時間長度:
01:18
Hitless Switching: Watch how our innovative phase cancellation eliminates phase hits in clock applications.

Get Your Clocks in Sync: Software Setup

日期:
2017年 8月 7日

時間長度:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers
28 結果
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