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例如 , 09/17/2021

例如 , 09/17/2021

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87 結果

Advantages of LVDS

日期:
2018年 4月 23日

時間長度:
06:35
Deep dive into the advantages of LVDS such as data rate, low power consumption, noise immunity, and EMI reduction for point to point communication interface.

Better Clocking for Serial Link Applications: TI's BAW-Based LMK05318

日期:
2018年 12月 11日

時間長度:
04:27
This video provides an overview of TI's BAW-based network synchronizer clock device and its benefits in clocking 400G serial link applications.

CDCE9xx Evaluation Modules

日期:
2014年 11月 3日

時間長度:
07:01
A discussion of input/output, jumper settings, power supply and control pin mode for the evaluation modules for the CDCE9xx family of clocks. For more informat

CDCE9xx Family Programming EVM

日期:
2014年 11月 3日

時間長度:
03:35
An exploration of the CDCE9xx family programming EVM, including hardware discussion and “how to program” guide. For more information on related products, visit
Engineer It Analog How-to Training

Clock and timing

These training videos cover a wide variety of high-performance clock and timing topics.

Clock Design Tool - Device Simulation

日期:
2014年 11月 2日

時間長度:
08:53
Dean shows clock device simulation using TI's easy-to-use Clock Design Tool.

Clock Design Tool - Getting Started

日期:
2014年 11月 2日

時間長度:
11:48
Dean introduces TI's Clock Design Tool and its easy-to-use graphical user interface

Clock Design Tool - Loop Filter Design

日期:
2014年 11月 2日

時間長度:
05:31
Dean shows how to use TI's Clock Design Tool to quickly do PLL loop filter design. TI Clock Design Tool software is used to aid part selection, loop filter des

Clocking solutions for high-speed multi-channel applications

Learn more about clocking solutions for high-speed multi-channel applications.
1 of 5: Local oscillator and GHz clocks requirements in Radio applications systems with LMX2594.

Datasheet overview: Local oscillator and GHz clocks requirements in Radio systems with LMX2593

日期:
2017年 4月 29日

時間長度:
09:25
This last video discusses how to understand the key phase noise specifications with a D/S using LMX2594. 

DLP® products

Learn more about our DLP product portfolio.

Embedded processing

Learn more about our embedded processing portfolio and resources.
Engineer It Analog How-to Training

Engineer it

This series provides fundamental knowledge and solutions to overcome design challenges.

Engineer It : 如何测量附加抖动扇出缓冲器

日期:
2016年 5月 5日

時間長度:
12:07
了解如何正确测量残余噪声的时钟扇出缓冲器,这样就不会影响到会降低高精度应用中的系统性能从 Jim Catt, 是 TI 时钟应用小组的经理。
Fanout Universal Clock Buffers

Engineer It: How to measure additive jitter in fanout buffers

日期:
2016年 4月 19日

時間長度:
12:07
Learn how to properly measure residual noise of clock fanout buffers

Frequency planning and loop filter design using CDCE62005

日期:
2014年 11月 1日

時間長度:
04:14
Planning and loop filter design is now easy using the latest tools available in the CDCE62005 GUI.

Get Your Clocks in Sync for JESD204B Data Converters

日期:
2017年 9月 6日

時間長度:
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.

Get Your Clocks in Sync: Hardware Setup

日期:
2017年 8月 14日

時間長度:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

Get Your Clocks in Sync: Software Setup

日期:
2017年 8月 7日

時間長度:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers

Hercules How to Tutorial: Force a Clock Monitor Failure

日期:
2015年 3月 10日

時間長度:
12:47
This ‘How to Tutorial’ video highlights the clock monitoring circuitry integrated into many Hercules Safety MCUs.  It walks the viewer through an overview of th
87 結果
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