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例如 , 10/21/2021

例如 , 10/21/2021

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496 結果

Getting Best Performance From Your GSPS and RF Sampling ADC Designs

日期:
2017年 5月 8日

時間長度:
28:42
This video will talk about matching networks and clocking requirements for GSPS and RF Sampling ADC Inputs.

Designing with Delta-Sigma ADCs: System design considerations to optimize performance

In this training series, you will how delta-sigma ADCs sample, how signals alias and understand which design parameters are most important.

Delta-Sigma ADCs Overview

日期:
2017年 5月 8日

時間長度:
04:35
This video will provide an overview of delta-sigma ADC topology.

How to measure ECG: A guide to the signals, system blocks and solutions

This training series explains the clinical basics of ECG, the physiology behind the signal and how to model the body with ideal electrical components.
More-Channels-in-Less-Space-New-Trends-In-Highly-Integrated-DACs.png

Webinar - More Channels in Less Space: New Trends in Highly Integrated DACs

日期:
2017年 6月 20日

時間長度:
32:42
How a Highly Integrated Quad Channel Analog output module with Adaptive power management Solves the space demand problem in factory automation
4-20mA input

Designing a Multi-Channel 4-20mA Analog Input Module

日期:
2017年 6月 21日

時間長度:
37:30
This training discusses real-world system requirements for a multi-channel 4-20mA analog input module for programmable logic controller (PLC).

Precision Signal Injector Demo

日期:
2017年 6月 23日

時間長度:
01:01
High Precision Digital to Analog Converter Training with Signal High-Fidelity Source Evaluation Module showcases our most precise data converter, the ADS8900B.

LMH3401 7GHz Fully Differential High-Speed Amplifier Overview

日期:
2017年 6月 27日

時間長度:
04:25
LMH3401 7-GHz, fully differential ultra-wide band amplifier provides a fixed gain of 16 dB and is well suited for use in DC to radio frequency applications.
Understanding Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Understanding signal to noise ratio and noise spectral density in high speed data converters

日期:
2017年 7月 28日

時間長度:
14:32
Concepts of Signal to Noise Ratio and Noise Spectral Density; an example on how NSD is used to estimate the DAC output as it pertains to noise floor.
Understanding Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Sampling vs. data rate, decimation (DDC) and interpolation (DUC) in high-speed data converters

日期:
2017年 7月 31日

時間長度:
18:41
Explore the differences between sample rate and data rate and use decimation or interpolation to decrease or increase the data rate.
Bandwidth vs Frequency(Subsampling Concepts)

Bandwidth vs. Frequency - Subsampling Concepts

日期:
2017年 7月 31日

時間長度:
09:17
Learn more about subsampling concepts pertaining to bandwidth vs. frequency, including: Nyquist frequency, aliasing, under-sampling, and input bandwidth.
Jitter vs SNR for High Speed ADCs

Jitter's impact on signal-to-noise ratio (SNR) for high-speed analog-to-digital converters (ADCs)

日期:
2017年 7月 31日

時間長度:
08:00
Considerations of Clock jitter, the impact on SNR, how to calculate it and minimize noise degradation for High-Speed Analog-to-Digital Converters.

Comparing high-speed analog-to-digital (ADC) and digital-to-analog (DAC) converter architectures

日期:
2017年 8月 2日

時間長度:
18:40
Overview of high-speed data converter architectures: pipeline, interleaved, Successive Approximation Register (SAR), DAC current source and current sink.

Get Your Clocks in Sync: Software Setup

日期:
2017年 8月 7日

時間長度:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers

Get Your Clocks in Sync: Hardware Setup

日期:
2017年 8月 14日

時間長度:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

OPA838 Decompensated High-Speed Amplifier Overview

日期:
2017年 8月 22日

時間長度:
04:13
The 300-MHz gain bandwidth product, OPA838 voltage feedback amp is well-suited for use as a low-power 12 to 14-bit SAR ADC driver or transimpedance amp.

OPA837 Ultra-Low-Power High-Speed Amplifier Overview

日期:
2017年 8月 22日

時間長度:
04:48
The 105-MHz, OPA837 ultra-low-power amp is well-suited for use as a low-power 12 to 16-bit SAR ADC driver and for ultra-low-power active filter designs.

Get Your Clocks in Sync for JESD204B Data Converters

日期:
2017年 9月 6日

時間長度:
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.
SAR ADC Power Scaling

SAR ADC Power Scaling

日期:
2017年 9月 11日

時間長度:
18:54
This video highlights the considerations for low-power system design.  
Real and Complex Modulation

High Speed Data Converter Signal Processing: Real and Complex Modulation

日期:
2017年 9月 14日

時間長度:
15:45
This video covers phase and amplitude modulation, introduces the concepts of real and complex modulation and provides an example modulation use case.
496 結果
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