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例如 , 12/03/2021

注意:各項之間請以逗號分隔

例如 , 12/03/2021

例如 , 12/03/2021

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79 結果
Schematic representation of matching inverted clock inputs with an inverter.

Synchronize Inverted Clock Inputs

日期:
2018年 6月 29日

時間長度:
01:04
How to synchronize devices with inverted clock inputs operating off the same clock source.

The Logic Minute – Logic and translation

The Logic Minute video series makes complex ideas related to logic and translation easy to understand in just a couple of minutes.

TIs New Space Saving Package

日期:
2014年 11月 1日

時間長度:
01:44
As electronics continue to permeate into new areas of automotive, medical, and industrial applications, packaging finds itself enabling new features.
Simplified translation schematic with the LSF.

Translation Basics with the LSF Family

日期:
2017年 10月 17日

時間長度:
02:35
An overview of translation concepts and terms common to the down translation and up translation videos.

Translation Between Communication Modules and System Controllers

日期:
2018年 11月 5日

時間長度:
01:37
How to choose the correct auto bidirectional translator for communication modules and system controllers.
Understanding Bus Hold Functionality for Level Translators

Understanding Bus Hold Functionality for Level Translators

日期:
2018年 9月 8日

時間長度:
02:32
This video provides an overview of the bus hold functionality found on many level translators and its suitability for use within applications.

Understanding Flip-flops,shift registers

日期:
2018年 5月 3日

時間長度:
05:07
Understanding Shift Registers and Flip-flops

Understanding schmitt trigger

日期:
2018年 5月 3日

時間長度:
05:24
Understanding Schmitt trigger
Internal schematic for LSF bias circuit operation

Understanding the Bias Circuit for the LSF Family

日期:
2017年 10月 17日

時間長度:
03:20
A deep look at how the bias circuit works in an LSF device.

Understanding the LSF family of bidirectional, multi-voltage level translators

In this section, the level shifter experts provide short lessons on the LSF family of voltage level translators from basic applications to device operation.
Pitfalls of Discrete Push-Pull Level Shifting

Understanding the pitfalls of discrete level shifting circuits

日期:
2018年 5月 21日

時間長度:
08:23
This video outlines common drawbacks to discrete push-pull level shifting implementations, introducing the 2N7001T device as a discrete replacement.
Internal schematic for up translation with an LSF family device.

Up Translation with the LSF Family

日期:
2017年 10月 17日

時間長度:
05:39
A deep look at how an LSF device achieves up translation.
Systems can have multiple error flags that need to be monitored.

Use Fewer Inputs to Monitor Error Signals

日期:
2018年 3月 28日

時間長度:
01:59
How to use logic gates to reduce the number of inputs required to monitor multiple error flags.
Example incorrect circuit for the enable pin of the LSF.

Using the Enable Pin with the LSF Family

日期:
2017年 10月 17日

時間長度:
02:25
How to use the enable pin correctly with an LSF device.
JTAG level translation AXC4T774 TXB0104

Voltage Level Translation for the JTAG Interface

日期:
2019年 10月 22日

時間長度:
02:08
An introduction to the JTAG interface and TI's voltage level translation solutions.
UART interface

Voltage Level Translation for UART Interface

日期:
2019年 1月 1日

時間長度:
02:27
TI's signal level translation for the UART interface

Voltage translation in switches and routers

日期:
2019年 2月 21日

時間長度:
01:57
Next-generation switches and routers are using lower operating voltages in their systems; creating the need for voltage translation to solve voltage mismatches.

What is Tech Day?

日期:
2019年 6月 6日

時間長度:
00:48
Overview of what Tech Day has to offer

X1QFN: The industry's smallest QFN package

日期:
2016年 9月 12日

時間長度:
04:31
Expanding the Standard Logic Products ecosystem, TI is introducing the first X1QFN package.
79 結果
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